Performance, Improvement and Perspective Application of an All-Optical Shift Register

An all-optical shift register based on Self Electro-Optic Effect Devices is introduced. The switching behavior, system performance and some possible improvements are presented. Calculations show the system bit rate could be up to 790 Mbps with 1 mW clock power. An improved scheme is discussed, which can provide 2 Gbps throughput for 1 mW clock power. Finally we presented an application of this all-optical shift register in fast photonic packet switching. Introduction Perhaps the most interesting research area in photonics switching optoelectronic devices is the quantum well Self Electro-optic Effect Devices (SEEDs). SEEDs works on the changing optical absorption which is dependent on the changing electrical field perpendicular to the thin semiconductor layers in quantum well material. The physics of the SEED has been presented in many papers. In this paper, an all-optical shift register based on SEEDs, which is certainly the heart of an alloptical switch, is presented. Based on master-slave system configuration, the switching behavior and the system performance is analyzed, and the system bit rate is calculated as well. Based on these results, Some simulations for the dependence of the system bit rate are given, some factors on optimization of system performance are discussed. Based on these results. an improved all-optical shift register is presented, which can provide 2 Gbps system throughput for 1 mW clock power. It is shown that the design of this all-optical shift register is a compromise, higher power clock beam, devices with optimum absorption coefficients in the ‘‘high’’ and “low” states while minimum applied electrical field will exhibit better performance. All-optical shift register based on SEEDs The shift register will be implemented by optical integrated chip; it is made up of a number of memory cells, which are cascaded as master-slave configuration, and is operated in a time sequential manner as shown in Fig. 1. In a single memory cell, a pair of lower input signals set the state of the SSEEDs, the higher power clock beams will be injected to read out the state of the S-SEEDS. The further detail of this all-optical shift register can be found in -